1. Vivado Design Suite Tool Flow（Vivado Design Suite
   ? Vivado Design Suite Tool Flow（Vivado Design Suite 工具流程）培訓(xùn)
   Who Should Attend?
   Digital designers new to FPGA design who need to learn the FPGA design cycle and the major aspects of the Vivado Design Suite
2. Course Outline
   Design Methodology Summary
   Project Planning
   Vivado IDE Overview and Projects
   Lab 1:?Vivado IDE Projects
   Vivado Tool Flow
   Lab 2:?Vivado Tool Flow
   I/O Pin Planning and Clock Constraints
   Lab 3:?I/O Pin Planning and Clock Constraints
   ISim Simulator
   Lab 4:?XSIM Simulator (VHDL or Verilog)
   Appendix: Design Methodology
   Appendix: HDL Coding Techniques
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